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 DM74AS873 Dual 4-Bit D-Type Transparent Latches with 3-STATE Outputs
December 1986 Revised July 2003
DM74AS873 Dual 4-Bit D-Type Transparent Latches with 3-STATE Outputs
General Description
These dual 4-bit registers feature totem-pole 3-STATE outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. The high-impedance state and increased high-logic-level drive provide these registers with the capability of being connected directly to and driving the bus lines in a bus-organized system without need for interface or pull-up components. They are particularly attractive for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The eight latches of the DM74AS873 are transparent Dtype latches meaning that while the enable (G) is HIGH the Q outputs will follow the data (D) inputs. When the enable is taken LOW the output will be latched at the level of the data that was set up. A buffered output control input can be used to place the eight outputs in either a normal logic state (HIGH or LOW logic levels) or a high-impedance state. In the high-impedance state the outputs neither load nor drive the bus lines significantly. The output control does not affect the internal operation of the latches. That is, the old data can be retained or new data can be entered even while the outputs are OFF. The pinout is arranged to ease printed circuit board layout. All data inputs are on one side of the package while all outputs are on the other side.
Features
s Switching specifications at 50 pF s Switching specifications guaranteed over full temperature and VCC range s Advanced oxide-isolated, ion-implanted Schottky TTL process s 3-STATE buffer-type outputs drive bus lines directly s Space Saving 300 Mil Wide Package s Bus structured pinout
Ordering Code:
Order Number DM74AS873NT Package Number N24C Package Description 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
(c) 2003 Fairchild Semiconductor Corporation
DS006330
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DM74AS873
Function Table
Inputs CLR X L H H H D X X H L X EN X X H H L OC H L L L L Output Q Z L H L Q0
Logic Diagram
L = LOW State H = HIGH State X = Don't Care Z = High Impedance State Q0 = Previous Condition of Q
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2
DM74AS873
Absolute Maximum Ratings(Note 1)
Supply Voltage Input Voltage Voltage Applied to Disabled Output Operating Free Air Temperature Range Storage Temperature Range Typical JA N Package 47.0C/W 7V 7V 5.5V 0C to +70C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.
-65C to +150C
Recommended Operating Conditions
Symbol VCC VIH VIL IOH IOL tW tSU tH TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Pulse Width Enable HIGH Clear LOW Data Setup Time (Note 2) Data Hold Time (Note 2) Free Air Operating Temperature 5.5 ns 3.5 2 3 0 70 ns ns Parameter Min 4.5 2 0.8 Nom 5 Max 5.5 Units V V V mA mA
-15
48
C
Note 2: The () arrow indicates the negative edge of the enable is used for reference.
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25C. Symbol VIK VOH Parameter Input Clamp Voltage HIGH Level Output Voltage VOL II IIH IIL IO (Note 3) IOZH IOZL ICC LOW Level Output Voltage Input Current at Max Input Voltage HIGH Level Input Current LOW Level Input Current Output Drive Current OFF-State Output Current, HIGH Level Voltage Applied OFF-State Output Current, LOW Level Voltage Applied Supply Current VCC = 5.5V, VIH = 2.7V VCC = 5.5V, VIL = 0.4V VCC = 5.5V, VO = 2.25V VCC = 5.5V, VIH = 2V VO = 2.7V VCC = 5.5V, VIH = 2V VO = 0.4V VCC = 5.5V Outputs Open Outputs HIGH Outputs LOW Outputs Disabled 68 67 80 -30 Conditions VCC = 4.5V, II = -18 mA VCC = 4.5V, VIL = Max IOH = Max IOH = -2 mA, VCC = 4.5V to 5.5V VCC = 4.5V, VIH = 2V IOL = Max VCC = 5.5V, VIH = 7V 2.4 VCC -2 0.35 0.5 0.1 20 -0.5 -112 50 -50 110 109 129 3.3 Min Typ Max -1.2 Units V V V V mA A mA mA A A mA mA mA
Note 3: The output conditions have been chosen to produce a current that closely approximates one half of the true short circuit current, IOS.
3
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DM74AS873
Switching Characteristics
over recommended operating free air temperature range. All typical values are measured at VCC = 5V, TA = 25C. Symbol Parameter Conditions From To Min tPLH tPHL tPLH tPHL Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output tPZH Output Enable Time to HIGH Level Output tPZL Output Enable Time to LOW Level Output tPHZ Output Disable Time from HIGH Level Output tPLZ Output Disable Time from LOW Level Output tPHL Propagation Delay Time HIGH-to-LOW Level Output Clear Output Control Output Control Output Control VCC = 4.5V to 5.5V RL = 500 CL = 50 pF Data Data Enable Enable Output Control Any Q Any Q Any Q Any Q 3 3 6 4 Max 6.5 6 11.5 7.5 Units ns ns ns ns
Any Q
2
6.5
ns
Any Q
4
9.5
ns
Any Q
2
6.5
ns
Any Q
2
7.5
ns
Any Q
3
8.5
ns
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4
DM74AS873 Dual 4-Bit D-Type Transparent Latches with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N24C
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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